- circuit testability
- контролепригодность схем
The English-Russian dictionary on reliability and quality control. 2015.
circuit testability
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Three-dimensional integrated circuit — In electronics, a three dimensional integrated circuit (3D IC, 3D IC, or 3 D IC) is a chip in which two or more layers of active electronic components are integrated both vertically and horizontally into a single circuit. The semiconductor… … Wikipedia
Design for testing — Design for Test (aka Design for Testability or DFT ) is a name for design techniques that add certain testability features to a microelectronic hardware product design. The premise of the added features is that they make it easier to develop and… … Wikipedia
Digital electronics — Main articles: Electronics and Electronic circuit Digital electronics represent signals by discrete bands of analog levels, rather than by a continuous range. All levels within a band represent the same signal state. Relatively small changes to… … Wikipedia
Design For Test — (aka Design for Testability or DFT ) is a name for design techniques that add certain testability features to a microelectronic hardware product design. The premise of the added features is that they make it easier to develop and apply… … Wikipedia
Theory — The word theory has many distinct meanings in different fields of knowledge, depending on their methodologies and the context of discussion.In science a theory is a testable model of the manner of interaction of a set of natural phenomena,… … Wikipedia
Test engineer — A (hardware) test engineer (TE) is a professional who determines how to create a process that would test a particular product in manufacturing, or related area like RMA department, in order to guarantee that the product will be shipped out with… … Wikipedia
Joint Test Action Group — (JTAG) is the usual name used for the IEEE 1149.1 standard entitled Standard Test Access Port and Boundary Scan Architecture for test access ports used for testing printed circuit boards using boundary scan.JTAG was an industry group formed in… … Wikipedia
Semiconductor device fabrication — Semiconductor manufacturing processes 10 µm 1971 3 µm 1975 1.5 µm 1982 … Wikipedia
Boundary scan — is a method for testing interconnects (wire lines) on printed circuit boards or sub blocks inside an integrated circuit.The Joint Test Action Group (JTAG) developed a specification for boundary scan testing that was standardized in 1990 as the… … Wikipedia
DFX — Le sigle anglais DFX, formé à partir des initiales de Design For X, est l ensemble des règles à observer lors de l étude, la conception d un circuit intégré ou d un système électronique ou encore de tout système afin de d améliorer le terme qui… … Wikipédia en Français
Nate Edwards — Nathen P. Edwards (born 1922) is a former IBM hardware architect, retired in 1997. He did his military service from 1942 to 1946, as a LTJG, Deck, USNR, Pacific, Chief Radio Technician, followed by Stanford University, where he gained an MS EE in … Wikipedia
